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| IRF340 Data Sheet March 1999 File Number 2307.3 10A, 400V, 0.550 Ohm, N-Channel Power MOSFET This N-Channel enhancement mode silicon gate power field effect transistor is designed, tested and guaranteed to withstand a specific level of energy in the breakdown avalanche mode of operation. These MOSFETs are designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. Formerly developmental type TA17424. Features * 10A, 400V * rDS(ON) = 0.550 * Single Pulse Avalanche Energy Rated * SOA is Power-Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance * Majority Carrier Device * Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards" Ordering Information PART NUMBER IRF340 PACKAGE TO-204AE BRAND IRF340 Symbol D NOTE: When ordering, use the entire part number. G S Packaging JEDEC TO-204AE DRAIN (FLANGE) SOURCE (PIN 2) GATE (PIN 1) 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999 IRF340 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified IRF340 400 400 10 6.3 40 20 125 1.0 520 -55 to 150 300 260 UNITS V V A A A V W W/oC mJ oC oC oC Drain To Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain To Gate Voltage (RGS = 20k) (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate To Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS ID(ON) IGSS rDS(ON) gfs d(ON) Electrical Specifications PARAMETER TEST CONDITIONS ID = 250A, VGS = 0V (Figure 10) VDS = VGS, ID = 250A VDS = Rated BVDSS, VGS = 0V VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 150oC VDS > ID(ON) x rDS(ON)MAX, VGS = 10V VGS = 20V ID = 5.2A, VGS = 10V (Figures 8, 9) VDS 50V, ID = 5.2A (Figure 12) VDD = 200V, ID 10A, RG = 9.1, RL = 19.5 (Figures 17, 18) MOSFET Switching Times are Essentially Independent of Operating Temperature MIN 400 2.0 10 5.8 - TYP 0.4 8 17 27 45 20 41 7 23 1250 300 80 5.0 MAX 4.0 25 250 100 0.550 21 41 75 36 63 - UNITS V V A A A nA S ns ns ns ns nC nC nC pF pF pF nH Drain To Source Breakdown Voltage Gate Threshold Voltage Zero Gate Voltage Drain Current On-State Drain Current (Note 2) Gate to Source Leakage Current Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge (Gate to Source + Gate to Drain) Gate to Source Charge Gate to Drain "Miller" Charge Input Capacitance Output Capacitance Reverse Transfer Capacitance Internal Drain Inductance tr td(OFF) tf Qg(TOT) Qgs Qgd CISS COSS CRSS LD VGS = 10V, ID = 10A, VDS = 0.8 x Rated BVDSS Ig(REF) = 1.5mA (Figures 14, 19, 20) Gate Charge is Essentially Independent of Operating Temperature - VDS = 25V, VGS = 0V, f = 1MHz (Figure 11) - Measured between the Contact Screw on Header that is Closer to Source and Gate Pins and Center of Die Measured from the Source Lead, 6mm (0.25in) from Header and Source Bonding Pad Modified MOSFET Symbol Showing the Internal Device Inductances D LD G LS S - Internal Source Inductance LS - 12.5 - nH Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient RJC RJA Free Air Operation - - 1.0 30 oC/W oC/W 2 IRF340 Source To Drain Diode Specifications PARAMETER Continuous Source to Drain Current Pulse Source to Drain Current (Note 3) SYMBOL ISD ISDM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Rectifier G D MIN - TYP - MAX 10 40 UNITS A A S Drain to Source Diode Voltage (Note 2) Reverse Recovery Time Reverse Recovery Charge NOTES: VSD trr QRR TJ = 25oC, ISD = 9.2A, VGS = 0V (Figure 13) TJ = 25oC, ISD = 9.2A, dISD/dt = 100A/s TJ = 25oC, ISD = 9.2A, dISD/dt = 100A/s 170 1.6 350 4.0 2.0 790 8.2 V ns C 2. Pulse Test: Pulse Width 300s, Duty Cycle 2%. 3. Repetitive Rating: Pulse width limited by Max junction temperature. See Transient Thermal Impedance Curve (Figure 3). 4. VDD = 50V, starting TJ = 25oC, L = 9.2mH, RG = 25, peak IAS = 10A (Figures 15, 16). Typical Performance Curves 1.2 POWER DISSIPATION MULTIPLIER 1.0 ID, DRAIN CURRENT (A) 0 50 100 150 10 8 0.8 0.6 0.4 0.2 0 6 4 2 0 25 50 75 100 125 150 TC , CASE TEMPERATURE (oC) TC , CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE ZJC, TRANSIENT THERMAL IMPEDANCE 2 1 0.5 0.2 0.1 0.1 0.05 0.02 0.01 0.01 SINGLE PULSE PDM t1 t2 10-3 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC + TC 10-5 10-4 0.1 10-3 10-2 t1, RECTANGULAR PULSE DURATION (s) 1 10 FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE 3 IRF340 Typical Performance Curves 102 10s ID, DRAIN CURRENT (A) ID , DRAIN CURRENT (A) 100s (Continued) 15 VGS = 6V VGS = 10V 12 VGS = 5.5V 9 VGS = 5V 6 VGS = 4.5V VGS = 4V 0 103 0 40 80 120 160 200 VDS , DRAIN TO SOURCE VOLTAGE (V) 80s PULSE TEST 10 1ms 1 TC = 25oC TJ = 150oC SINGLE PULSE 1 102 10 VDS, DRAIN TO SOURCE VOLTAGE (V) OPERATION IN THIS AREA LIMITED BY rDS(ON) 10ms DC 3 0.1 FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS IDS(ON), DRAIN TO SOURCE CURRENT (A) 15 80s PULSE TEST 12 VGS = 10V VGS = 6V 100 VDS 50V 80s PULSE TEST ID, DRAIN CURRENT (A) VGS = 5.5V 9 VGS = 5V 6 VGS = 4.5V VGS = 4V 0 0 2 4 6 8 VDS , DRAIN TO SOURCE VOLTAGE (V) 10 10 1 TJ = 150oC 3 TJ = 25oC 0.1 0 2 4 6 8 VGS , GATE TO SOURCE VOLTAGE (V) 10 FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS 5 80s PULSE TEST rDS(ON), DRAIN TO SOURCE 4 ON RESISTANCE VGS = 10V NORMALIZED DRAIN TO SOURCE ON RESISTANCE 3.0 ID = 10A VGS = 10V 2.4 3 1.8 2 VGS = 20V 1 1.2 0.6 0 0 10 20 30 40 50 ID , DRAIN CURRENT (A) 0 -60 -40 -20 80 100 120 140 160 0 20 40 60 TJ, JUNCTION TEMPERATURE (oC) FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 4 IRF340 Typical Performance Curves 1.25 ID = 250A NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 1.15 C, CAPACITANCE (pF) 2000 (Continued) 2500 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS CDS + CGS CISS 1.05 1500 0.95 1000 0.85 500 CRSS COSS 0.75 -60 -40 -20 0 20 40 60 80 100 120 140 160 TJ , JUNCTION TEMPERATURE (oC) 0 1 10 100 VDS , DRAIN TO SOURCE VOLTAGE (V) 1000 FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE 15 gfs, TRANSCONDUCTANCE (S) 12 TJ = 25oC ISD, SOURCE TO DRAIN CURRENT (A) VDS 50V 80s PULSE TEST 100 10 9 TJ = 150oC 6 TJ = 150oC 1 TJ = 25oC 3 0 0.1 0 4 8 12 ID , DRAIN CURRENT (A) 16 20 0 0.3 0.6 0.9 1.2 VSD , SOURCE TO DRAIN VOLTAGE (V) 1.5 FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE 20 VGS, GATE TO SOURCE VOLTAGE (V) ID = 10A 16 VDS = 320V VDS = 200V VDS = 80V 12 8 4 0 0 12 24 36 48 Qg(TOT), TOTAL GATE CHARGE (nC) 60 FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE 5 IRF340 Test Circuits and Waveforms VDS BVDSS L VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP RG IAS VDD tP VDS VDD + - 0V IAS 0.01 0 tAV FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS tON td(ON) tr RL VDS 90% tOFF td(OFF) tf 90% + RG DUT - VDD 0 10% 90% 10% VGS VGS 0 10% 50% PULSE WIDTH 50% FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS CURRENT REGULATOR VDS (ISOLATED SUPPLY) VDD SAME TYPE AS DUT Qg(TOT) Qgd Qgs D VDS VGS 12V BATTERY 0.2F 50k 0.3F G DUT 0 Ig(REF) 0 IG CURRENT SAMPLING RESISTOR S VDS ID CURRENT SAMPLING RESISTOR Ig(REF) 0 FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS 6 IRF340 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029 7 |
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